At a point when a processor has been powered up, or after a reset has been performed, the processor must be configured to execute a program. In order to accomplish this, a boot loader or a boot controller is required to setup a start address, a stack and other pointers to a SRAM as well as into local memory. If the system includes a read only memory (ROM) that has programmed boot information, then a boot controller is not required, but no changes to the boot sequence can be made without re-booting with a ROM that has been setup with the required changes.
If the system includes a non-volatile code memory, a boot controller is required to setup the starting points necessary to run the system boot and subsequent programs. In this situation there is no prior knowledge of the state of non-volatile memory, memory is assumed un programmed, and the processor must remain idle initially after power on. A boot controller is required to write a boot sequence into memory, then setup the start address and enable the processor.
US 2011/0113227 A1 (Lu et al.) is directed to a plurality of boot devices and basic input/output system, used for recording driving parameters of boot devices. US 2009/0235125 A1 (Lai) is directed to a booting system comprising a non-XIP memory for storing a plurality of booting images comprising a source image. US 2005/0005197 A1 (Chong et al.) is directed to a method for detecting bootable media independent of media partitioning. U.S. Pat. No. 7,409,539 B2 (Arnez et al.) is directed to a method and system for managing boot code in a computer system. U.S. Pat. No. 7,318,173 B1 (Falik et al.) is directed to a method for selecting one of a plurality of BIOS images included in a computer system. U.S. Pat. No. 7,308,567 B2 (Yamamoto et al.) is directed to a bootstrap program having a first error check code assigned and stored in a first storage device. U.S. Pat. No. 7,302,517 B2 (Lim et al.) is directed to controlling XIP in a serial flash memory. U.S. Pat. No. 6,948,099 B1 (Tallam) is directed to an operating system stored in a reprogrammable memory in which the memory may store a primary and recovery operating systems. U.S. Pat. No. 6,823,435 B1 (Wisor) is directed to a non-volatile memory system having a boot code section. U.S. Pat. No. 6,574,747 B2 (Ginsberg) is directed to a system implementing an XIP architecture comprising a plurality of XIP regions.